Getting started with HDLs from regular programming

I've always kinda wanted to make my own microprocessor.. I've read How can I make my own microcontroller? .

I tried multiple times to learn some Verilog and VHDL. But for the life of me I just can not get my head around the language styles. I come from a C/C++/C# background and have dabbed some(with success) with doing functionalish programming with Ruby.

Can anyone suggest a book or开发者_如何学Python online resource for teaching an HDL language from scratch(so that I can unlearn my procedural way of thinking)

Also, I am having trouble getting my head around exactly how to simulate an HDL program. There is nothing like printing or stuff in hardware, so what is the best way of testing programs without an FPGA(I'm going to order one of those sometime though!). How exactly does simulating it work?

Basically I'm just needing someone to help me get my head around HDLs and their simulation.

Remember, HDLs were intended to model hardware. With hardware everything happens at once. By hardware, I mean a collection of logic gates connected to inputs and to the outputs of other logic gates in some fashion. This is essentially what an FPGA or an ASIC is (in an FPGA those connections are programmable). Wiggle an input and the effects ripple through the chain of logic gates - think of every logic gate as a little processor that's constantly evaluating it's inputs.

So in an HDL the first thing you need to consider is that all assignments are happening at the same time. The only place things happen in the "normal" sense (one statement following another as in a regular programming language) is inside of a process block (in VHDL, or an always block in Verilog). But then you have to realize that all of the process blocks (or always blocks in Verilog) are also executing concurrently.

HDLs are just trying to model the concurrency of hardware.

As far as books that try to teach HDLs to software developers... I don't think there are any. Most are aimed at Hardware Engineers.

You mentioned that you've done some Ruby programming. If you want to play with an HDL written in Ruby you can try out RHDL: http://rhdl.rubyforge.org/ The basic HDL concepts are there and it looks a lot like VHDL, but it's Ruby so you can experiment a bit more with the innards. You can write models and then simulate them. There are some examples included.

Debugging is done with the simulator and its waveform viewer - you can watch what all your internals are doing over time. In addition, with Modelsim you can also do software-like breakpoints inside processes.

You can print things out with VHDL using the "report" statement, but you have to do your formatting in a very non-SW way:

report "The value is not " & integer'image(some_integer_variable);

For somewhat easier printing, use the textio package.

Another tip - lots of code out there has use ieee.std_logic_arith.all; in it. That library is non-standard (despite the IEEE moniker), use ieee.numeric_std.all instead.

Start simple - create a counter which goes up by one each time the clock ticks (use the if rising_edge(clk) then idiom). When the counter gets to a particular value, toggle a signal.

Create a testbench to simulate it, which basically means just making the clk signal go '0', '1', '0', '1'.

An easy to understand way is this:

process:
begin
    clk <= '0';
    wait for 5 ns;
    clk <= '1'; 
    wait for 5 ns;
end process;

Run the sim, watch your counter go up, and the toggle signal toggle. If you make your counter big enough, you can then build an FPGA and watch an LED flash on and off by wiring up that toggle signal to an LED pin.

That's the FPGA equivalent to "Hello World"!

For debugging Verilog offers printf like system tasks like $display or $monitor. These are of course not synthesizable, but every simulator should understand them. Debugging then is on the one hand done, just like SW debugging, by printing out signal values and whatever else to the console using the already mentioned $diplay and stuff. And on the other hand by staring at signal wave forms until you find the ill spot. For these things you not even need an FPGA, a good simulator is all you need. But having a FPGA to make some LEDs blink is always nice :)

For simulation you should have a look on Modelsim. If you are on windows there is a student edition available for free.
http://www.model.com/content/modelsim-pe-student-edition-hdl-simulation

Another option is Xilinx' ISE Web-Pack. This even works on linux and includes the complete FPGA flow. http://www.xilinx.com/tools/webpack.htm
But I recommend Modelsim for simulation.

Some starting points I have at hand are:
http://www.asic-world.com/
http://www.doulos.com/knowhow/verilog_designers_guide/

My answer might be years late, but this is for future viewers who might have the same query.

I also came from a C++/C# background. My answer only concerns with Verilog HDL and not VHDL though. I'm currently taking a course this term and here are the books that helped me understand Verilog better:

• Verilog HDL: Digital Design and Modeling by Joseph Cavanagh
• Verilog HDL: A Guide to Digital Design and Synthesis by Samir Palnitkar

You can find a lot of books here as listed in asic-world site.

As skorgon had answered, you can use Xilinx ISE for simulation. It's the closest to Visual Studio with C++/C# as to Verilog. But for a primitive feel (no IDE), you might want to try iVerilog or Icarus Verilog. It is the one used in our course. Here's how to execute Verilog files using iVerilog:

Type your code on a text editor, save as .vl inside the bin folder of iVerilog. On command prompt, go to the bin folder. Then type the following:

iverilog -o <name of exe file you want for your .vl file> <your .vl file>
vvp <name of exe file>

Example:

iverilog -o samp sample.vl
vvp samp

Hope this helps!

Sometimes one need to print the instance name. This is useful if many instance of the same component are used in a design: "... While it is simple in VERILOG (%m in the display system function), in VHDL a bit more code writing is required. $display("dbg instance name %m at %d", $time); An example how to print an instance name in systemc is also available on this site.

The importance of such debug information is when a design contains many instances of the very same component.

First text IO library has to be called and line variable should be declared. Please refer to print example to see details.

Next you have to select between two options: One is: instance name only in debug string and the other option gives more information such as entry and architecture names..." http://bknpk.ddns.net/my_web/MiscellaneousHW/vhdl_path_name_print.html

If you are strong in C programming, you can learn any other programming language very easily. Hardware description languages are not very different. But you must know the basics of commonly used hardware components. For example, the design of a full adder is very simple if you know what are the inputs and outputs of the full adder. Also you must know the relationship between inputs and outputs. The pdf may be useful for a beginner.