How to add different rules for specific files?

I have a certain problem with my Makefile.

With this command, I can compile all my *.c files to *.o which works well:

$(OBJ) : %.o : %.c $(LDSCRIPT) Makefile
    $(CC) $(ARM9_INCLUDES) -c $(CFLAGS) $< -o $@

But now I'm wondering, what if I want to run -O3 opti开发者_如何学JAVAmization on just ONE particular file, and have -O0 on the rest?

Is there any command to add a different rule for a specific file?

What I'm doing right now is compiling each C file with its own rules, which is very annoying because I have around 30 files which makes the Makefile huge, and every time I change something in one file it compiles EVERYTHING again.

particular_file.o : CFLAGS+=-O3

(assuming GNU make) see target-specific variable values in GNU Make manual (and the immediately following pattern-specific variable values, maybe).

Also note, that commands are used from the most specific rule for given file, so you can have in case target-specific variable value is not sufficient:

particular_file.o : particular_file.c
        completely_special_compiler -o $@ $<

%.o : %.c
        $(CC) $(CFLAGS) -o $@ $<

It's possible to make the solution a bit more extensible.

Suppose you need to compile one set of files in one way and the other set of files in another way, rather than having only one exception, and you could identify patterns in those two sets of files, e.g. one set starts with "a", and the other set starts with "b", you can do something like this:

a%.o : a%.c
    completely_special_compiler -o $@ $<

b%.o : b%.c
    $(CC) $(CFLAGS) -o $@ $<

For more explanation, see Static Patterns.