For loop in Makefile has no effect

I have a one-line script passed into the foreach function in a Makefil开发者_C百科e, as shown below:

flag:
        $(foreach f, $*.txt, printf "%s\n" 0a "$(grep -o '[0-9]\+' $f | sed 's/.*/read \"&\"/')" "" . w q | ed $f)

What this script line does could be found here. I am just puzzled why it doesn't work this way, because if I put the line into a separate script and call it from the Makefile like this:

flag:
        $(forech f, $*.txt, ./script $f)

it works fine.

I also tried the shell for loop as follows:

flag:
        for f in $*.txt ; do \
          printf "%s\n" 0a "$(grep -o '[0-9]\+' $f | sed 's/.*/read \"&\"/')" "" . w q | ed $f ; \
        done

still no luck. I must touch some subtle points of Makefiles, could anyone enlighten me? Thanks.

Both too many and not enough $ signs! This lists the *.txt files - note the $$F:

all:
    for F in *.txt ; do \
    echo $$F ; done 

The solution is: adding one more $ before the sequence beginning with grep,

flag:
        $(foreach f, $*.txt, printf "%s\n" 0a "$$(grep -o '[0-9]\+' $f | sed 's/.*/read \"&\"/')" "" . w q | ed $f)

or use the old backticks instead

flag:
        $(foreach f, $*.txt, printf "%s\n" 0a "`grep -o '[0-9]\+' $f | sed 's/.*/read \"&\"/'`" "" . w q | ed $f)