Makefile design for arbitrary structure

I have my code organized into an arbitrary directory structure. For example, I have a directory containing source files, header files, other directories, each containing other sources and headers and possibly other directories inside, etc.

I want to create开发者_如何学运维 a GNU makefile that compiles each of the .c files to .o files, then combines all the .o files in an executable.

If I were to do this with bash, it would be something like:

for c in `find . -type f -name \*.c`; do
    gcc -c $c
done

find . -type f -name \*.o | xargs gcc -o main

Can I do something similar with GNU make?

Yes, absolutely. You can easily define a variable as the result of a shell command; use your find command to define a SRC variable, and make your target executable depend on SRC; i.e.,

SRC =  $(shell find . -type f -name \*.c)

executable: $(SRC:.c=.o)
    gcc -o $@ $^