Why does the IA-32 architecture push the EFLAGS register onto the stack prior to calling an interrupt handler?

Is it just because the EFLAGS register works like a switch? So when it's active, the interrupt is enabled, otherwise, it's not?

Say, in a Java program it would be something like,

 while (switch != 0){
     keepRun开发者_开发技巧ning;
 }

 Stop;

The core saves EFLAGS in the interrupt stack frame in order that the interrupted task can be resumed later. EFLAGS is part of the bare minimum machine state saved by the core in the stack frame, which also includes the instruction pointer (EIP), code segment (CS) and usually the user-mode stack pointer (ESP). When the interrupt service routine completes (with the IRET instruction), the core restores EFLAGS and the rest of the registers in the stack frame.

The basic philosophy here is that a task can execute without worry that any random interrupt will suddenly stomp on registers. It's the only sane approach.

I believe a reason for this is simply that the registers are modified by virtue of taking an interrupt. Namely the IE (interrupt-enable) flag will be cleared. If the CPU didnt push the flags, it wouldnt be able to modify the flags and would require extra state and extra instructions to get this hidden state.