<command-line>: error : in makefiles

I am trying to compile a large number of files using the make utility. In between the run I get the following e开发者_StackOverflowrror many times

<command-line>: error: macro names must be identifiers

Since I am using the -j option the log shows output from random threads. So the actual file where this error is encountered is very difficult to determined. Also no other errors pop up. Can somebody please tell me what actually this error is trying to indicate ?

This is from the C preprocessor. It generally happens when you pass a -D switch to gcc with an invalid symbol or no symbol at all.

The root cause is probably a line in your makefile like

CFLAGS=-g -D$(DEBUG)

or something like that, where DEBUG isn't actually defined anywhere.

This is not an error message from make, but from the preprocessor (which is invoked by make). As others have said, run make without the -j option (either from the start, or after make -j has failed) to get a clearer view of where the error originates.

Not all Makefiles are ready for compilation with -j. Sometimes you just have to run make -j several times before the project will build all the way to the end. And you can always take off the -j once it does throw a failure, and try finishing the build with a single process in flight at any time. This can immensely cut down on unpredictability when trying to debug something, while still using parallel build jobs for some (or almost all, if you're lucky) of the compiles.

I'm having trouble tracking down what constitutes an identifier in make(1), but in most languages, restrictions are usually along the lines of: "first character must be [a-zA-Z], all other characters must be [a-zA-Z0-9_]". I imagine make(1)'s rules are similar.