How to read data from rom_type in VHDL?
How can I read data from rom_type?
entity my_rom is
port(
addr: in std_logic_vector(3 downto 0);
data: out std_logic_vector(0 to 7)
);
end my_rom;
architecture a of my_rom is
type rom_t开发者_高级运维ype is array (0 to 7) of std_logic_vector(0 to 7);
constant R1_ROM: rom_type :=
(
-- data
);
begin
data <= R1_rom(conv_integer(addr));
end a;
You are using conv_integer
, which is not part of raw VHDL... it's in a library. However, you don't want to use it - it's from a non-standard library.
Instead use ieee.numeric_std.all;
is what you need before your entity. Then use to_integer(unsigned(addr))
to index the ROM. Better still, pass the address in as an unsigned
vector, or even directly as an integer
.
Try to get out of the habit of using std_logic_vector
(which is just a bag of bits) to represent numbers, and use the well-defined numerical types.
Or use Verilog, which doesn't care :)
Myself, I prefer VHDL's strong-typing to keep me from daft foot-shooting...
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