Why do makefiles sometimes have 'true <filename>' as part of the build script?

For example:

# Some stuff

all: some depend开发者_JAVA技巧encies
    @$(CC) -o foo.o foo.c
    @true foo.o
    @some other operation

What purpose does the 'true foo.o' line serve?

Typically this is output from a Makefile generator such as automake. The true will be replaced with an actual command on platforms which require it. The most common case is platforms which don't maintain static archive indexes automatically; the code will look something like

foo.a: foo.o bar.o baz.o ...
        ar rv foo.a foo.o bar.o baz.o ...
        true foo.a

but on some platforms (those without either System V or GNU ar) it will instead be

foo.a: foo.o bar.o baz.o ...
        ar rv foo.a foo.o bar.o baz.o ...
        ranlib foo.a

The reason it's not simply removed is that it's a lot easier in m4 and other macro processors to substitute text on a line than it is to conditionally delete the line. (It can be done, but advanced m4 hackery has been known to cause insanity. :)