Using the pattern of a pattern rule in a function with GNU make

I'd like to use a pattern rule for compiling classes that depend on other classes. For each class I define the classes it depends on and the header file. When compiling a specifc class I'd like to add every header file of every class to the prerequisites like this:

# Class 1
C1 = C1
C1_H = C1.hpp
C1_T =
C1_O = C1.o

# Class 2, depending on class 1
C2 = C2 $(C1)
C2_H = C2.hpp
C2_T = 
C2_O = C2.o

.SECONDEXPANSION:

# pattern rule. Want to read the C%_H variable of every class this depends on
C%.o : C%.hpp C%.cpp $(foreach var,$$(C%),$($(var)_H))
    $(CC) -o $@ -c $<

The foreach function doesn't work her开发者_运维问答e, as the expansion of '%' occurs after the function expansion. Is there a way to still do this?

Thank you in advance

1) Here's a way to do what you're asking (more or less):

C1_HEADERS = C1.hpp
C1.o: $(C1_HEADERS)

C2_HEADERS = C2.hpp $(C1_HEADERS)
C2.o: $(C2_HEADERS)

# and so on

It may be possible to replace those second lines (Cn.o: $(Cn_HEADERS)) with a function call or something, but I really don't think it's worth the effort.

2) Here's one way in which your plan is overkill:

// C1.hpp
#include "A.hpp"
...


// C1.cpp
#include "C1.hpp"
#include "B.cpp"
...

So C1.o depends on B.hpp, but C2.o doesn't.

3) Here's a better way to handle these dependencies: Advanced Auti-Dependency Generation.