How many pipeline stages does the Intel Core i7 have? [duplicate]
How many instructions it can handle at a time ?
Agner Fog's documentation is a very good resource to understand what's going on. Reading it should help you understand. There's a limit to the number of instructions that are outstanding (the size of the retirement buffer), but there are many other limits that you'll likely hit before reaching that bottleneck, such as instruction decoder limitations, execution unit contention, ALU/divider pressure. Take a look, it's fascinating stuff!
http://www.bit-tech.net/hardware/cpus/2008/11/03/intel-core-i7-nehalem-architecture-dive/5
Penryn's pipeline was a very nippy 14 stages, while in comparison Nehalem extends this quite considerably to 20-to-24 stages.
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