start other makefile within makefile

Since i am not so experienced with the building process / makefiles on linux i ran in follow problem:

the Setup: i have an m开发者_开发百科akefile A, which needs some enviroment variables set before running, this is done by running . ./set_A_vars.sh (set_A_vars.sh contains many export lines) before running make -f A

now i need to make project A within a makefile B. i tried the following setup for makefile B:

all: debug release

A_debug:
    . ./set_A_vars.sh && make -f A DEBUG=1

A_release:
    . ./set_A_vars.sh && make -f A DEBUG=0

debug:   A_debug some_B_stuff_debug
release: A_release some_B_stuff_debug

however i get lots of errors, which sound like the enviroment variables in set_A_vars.sh have not been set for make -f A ... in B.

How can i call makefile A from makefile B with the enviroment variables in set_A_vars.sh set in makefile B ??

Any help appreciated.

Your makefile looks good with these provisos:

1. When you call make from a makefile, please use the macro invocation ${MAKE} rather than plain make. (This ensures parallel make works, and also means it still works even if your make has another name (GNUmake say).)

2. If your targets do not correspond to actual files, then mark them with .PHONY (see below).

3. Does some_B_stuff_debug require A to be built first? Then you must tell make this.

   some_B_stuff_debug: A_debug
   some_B_stuff_debug: A_release

   This is clearly wrong. One way is to enforce the ordering via the shell.

Try something like this:

.PHONY: debug
debug:
    . ./set_A_vars.sh && ${MAKE} -f A DEBUG=1
    ${MAKE} some_B_stuff_debug

.PHONY: release
release:
    . ./set_A_vars.sh && ${MAKE} -f A DEBUG=0
    ${MAKE} some_B_stuff_debug

.PHONY: some_B_stuff_debug
∶

Your makefiles should work. I suggest you try the following:

test_var:
    @echo FOO is $(FOO)

set_vars_and_test_them:
    ./set_A_vars.sh && echo FOO is $(FOO)

A_debug:
    ./set_A_vars.sh && make -f MakefileA DEBUG=1