DCM in Xilinx 10.1

How can I 开发者_Go百科generate different clocks in DCM? Suppose I want 20mhz, 24mhz, 28mhz, 32mhz, clocks simultaneously using single digital clock manager ip core in xilinx 10.1.

Try using clock wizard in Xilinx CoreGen application.

Each devices family can have a different implementation of the DCM. So to go any further you have to consider :-

Which Xilinx FPGA are you targeting?

and

What is you input clock frequency?

Each DCM can give you Clk, Clk 2x, Clk DV (Divde) and Clk Fx (Frequency Synthesis).

You can specify the divide ratio (1.5 to 16) for ClkDv.

For ClkFx you provide multiple (M) and divide (D) values, the clock rate is then input * M / D.

So a single DCM can not give you the 20mhz, 24mhz, 28mhz and 32mhz clocks that you ask for.

If you use the clock wizard that OutputLogic mentions, then you can play with the possible combinations. You can get the clock wizard by downloading the webpack from the Xilinx website.