How to read file from Makefile?

I am using GNU Make to build a multiple-directory project. My question is how can I use single makefile to build multiple devices? e.g. My application has to run on various X,Y,Z mobile devices each having different properties like screensize, keyboard type, platform version etc. I hav开发者_开发百科e to pass make -f <makefilename> <targetname>. Here targetname can be device name and model like Samsung CorbyPlus, but my makefile has to go to particular dirname of samsung and open the .txt file or so where all above properties are defined. I have to read all of them during build time and access in my code through some macros/defines/flags.

Can anyone suggest how to do this? Even better solution for my requirement will be appreciated.

I'd suggest using configuration makefiles. For example, suppose you have several device with its configurations:

config_device1.mk

OPTION1=yes
OPTION2=0

config_device2.mk

OPTION1=no
OPTION2=1

Then you can conditionally include them into base makefile using special parameter passed from command line (make -f makefile DEVICE=dev_type1) and use options from configuration files and process them:

makefile

ifeq ($(DEVICE),dev_type1)
include $(CONFIG_PATH)/config_device1.mk
endif

ifeq ($(DEVICE),dev_type2)
include $(CONFIG_PATH)/config_device1.mk
endif

ifeq ($(OPTION1),yes)
CFLAGS += -DBUILD_OPTION1     
endif

CFLAGS += -DBUILD_OPTION2=$(OPTION2)

BTW, for a long perspective (if you don't have time constraints now) it's better to use some of existing build system, read its manual and stick to its methodology.