x86 opcode encoding: sib byte

I'm currently trying to write a disassembler. I found the following list of opcodes and their meanings, so i decided to parse it at runtime: http://web.archive.org/web/20150810224114/http://mprolab.teipir.gr/vivlio80X86/pentium.txt

But i am 开发者_JAVA百科stuck at the opcode 0x00: It is followed by a reg/modbyte. Parsing it was not much of a problem for me.

But I'm having trouble with the Scale-Index-Base byte:

If you actually specify esp as index register, it actually means that there is no index register.

The same applies for the base register with ebp. But I've tried it with C++ inline assembler: It is possible to compile: add [ebp*2+ebp],cl

So how can ebp be used as base register when using ebp as base register actually means using no base register at all!?

The "missing EBP" case apply only in case ModR/M.Mod field has value 00 binary. If you need EBP as a base, the assembler changes the Mod to 01 binary and adds 8-bit displacement with value of zero:

004C6D00 add [ebp+ebp*2], cl