Why does task X, appear two times for unit 0 at clock cycles 4 and 5?

In the image below, why does task X, appear two times开发者_运维技巧 for unit 0 at clock cycles 4 and 5?

have to make a program for the arrangement of the pipeline, but I need to know why the above happens to complete it.

Is it just because the author wants it to repeat??

I'm pretty certain it just means that a task takes two clocks in unit 0 the second time through. The fact that it takes seven clocks in total alludes to this, 1 in unit0, 1 in unit1, 1 in unit2, 1 in unit3, 2 more in unit0 and finally 1 in unit4.

It may well just be a contrived example so that there was a conflict when shifting by one clock (the author had to do something to ensure that task 2 would catch up to task 1 and that seems the easiest solution) or unit0 may well be a non-linear processor of some sort.

Another example would have been trying to pump in a task at the point where the previous task was re-entering unit0.

What they're trying to show is that, given a maximum duration within a unit of N cycles in a pipeline, you have to limit your injections of work to one every N cycles to be sure of no conflict.

My bet (based on the small number of authors I know) would be on the author doing the minimal amount of work to describe the problem :-)