Forcing GNU make to execute specific target

I'm trying to execute a single target calling "make cleanlists". This target has no prerequisites and should be executed (in my understanding) immediately without touching other rules.

.PHONY: cleanlists
cleanlists:
    @echo cleani开发者_如何学Pythonng source and header lists ..
    @rm -f sourcelist.mk
    @rm -f headerlist.mk
    @echo done. 

But in case, that those two files don't exist, other rules having those files as prerequisites are checked and finally lead to regeneration of them before executing the 'cleanlists' target.

Is there any simple way forcing make to avoid this behaviour?

Thanks

The .mk names of these two files suggests that elsewhere in your makefile you are including them as makefile content to be parsed and executed:

include sourcelist.mk
include headerlist.mk

In order to execute your make cleanlists command with an up-to-date makefile, make regenerates these files and reparses the whole makefile before computing dependencies and executing commands, as described in How Makefiles Are Remade.

This makes little sense for a clean rule, but make doesn't know that. You can use this trick from the manual to treat this particular rule specially:

ifneq "$(MAKECMDGOALS)" "cleanlists"
include sourcelist.mk
include headerlist.mk
endif