How to keep asm output from Linux kernel module build

I'm working on a Linux kernel module for a 2.6.x kernel and I need to view the assembly output, though it's currently being done as a temporary file an deleted afterwords. I'd like to have the assembly output mixed with my C source file so I can easily trace where my problem lies. This is for an ARMv6 core and apparently objdump doesn't support this architecture. I've included my makefile below.

ETREP=/xxSourceTreexx/
GNU_BIN=$(ETREP)/arm-none-linux-gnu开发者_如何学Ceabi/bin
CROSS_COMPILE := $(GNU_BIN)/arm-none-linux-gnueabi-
ARCH := arm
KDIR=$(ETREP)/linux-2.6.31/
MAKE= CROSS_COMPILE=$(CROSS_COMPILE) ARCH=$(ARCH) make
obj-m += xxfile1xx.o

all:
 $(MAKE) -C $(KDIR) M=$(PWD) modules

clean:
 $(MAKE) -C $(KDIR) M=$(PWD) clean

Objdump does support that architecture. Your executable will be called arm-none-linux-gnueabi-objdump

Assuming gcc and the gnu assembler a more readable output than objdump can be had. Tell the assembler to retain its intermediate code using flags to gcc:

 -Wa,-alh=basename.s

And to get basename to be the actual source filename you need to tell make:

 -Wa,-alh=$<.s

which will leave piles of foo.c.s files laying around your source directory. The big problem here is that the way gcc works it uses temporary files between code generation and assembly. I can't find a way to make gcc save its intermediates but the assembler is happy to stash a listing for you.

Getting that argument into the Makefile CFLAGS is left as an exercise for the reader (because I kinda hate "make" and hate "gnu info" even more.

To get an assembly language listing of my Linux kernel modules, I added the assembler switches to the kernel scripts/Makefile.build.

#cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
cmd_cc_o_c = $(CC) $(c_flags) -c -Wa,-alh=$<.lst -o $(@D)/.tmp_$(@F) $<

You could try the flag "-save-temps" to gcc. It works for me in my embedded project, I haven't tried it on kernel builds.

The proper way is likely to add target dependencies in your module makefile / Kbuild file:

always-m += basename.s

(As kbuild has the proper targets to generate the .s files)

If you are lazy as I am, this could look like:

MOD_NAME := some_module_name
myunits := file1 file2 file3 ... and many more... without .c extension

obj-m   := $(MOD_NAME).o
$(MOD_NAME)-y := $(addsuffix .o,$(myunits))

# Comment/uncomment to generate assembly / preprocessor output
always-m += $(addsuffix .s,$(myunits)) $(MOD_NAME).mod.s
always-m += $(addsuffix .i,$(myunits)) $(MOD_NAME).mod.i

(2 bonuses here: assembly for the generated module meta-registration file, and the preprocessor output)