Cycles/byte calculations

In Crypto开发者_如何学编程 communities it is common to measure algorithm performance in cycles/byte. My question is, which parameters in the CPU architecture are affecting this number? Except the clockspeed ofcourse :)

Two important factors are:

1. the ISA of the CPU, or more specifically how closely CPU instructions map to the operations that you need to perform - if you can perform a given operation in one instruction one CPU but it requires 3 instructions on another CPU then the first CPU will probably be faster. If you have specific crypto instructions on the CPU, or extensions such as SIMD which can be leveraged, then so much the better.

2. the instruction issue rate of the CPU, i.e. how many instructions can be issued per clock cycle

Here are some CPU features that can impact cycles/byte:

• depth of pipeline
• number of IU and/or FPU able to work in parallel
• size of cache memories
• algorithms for branch prediction
• algorithms for handling cache miss

Moreover, you may be interested in the general problem of assessing WCET (worst case execution time)

Mainly:

• Memory bus bandwidth
• CPU instructions per cycle

How much memory the CPU can access per second can be a limiting factor. That depends on the algorithm and how big part of the work is memory access. Also which parts of the memory that is accesses will affect how well the memory cache works.

Nowadays instruction times is not measured in how many cycles an instruction takes, but how many instructions can be executed in the same cycle. The pre-processor in the CPU lines up several instructions to be executed in parallel, so it depends on how many parallel lines the CPU has and how well the code can be parallelised. Generally a lot of conditional branching in the algorithm makes it harder to parallelise.