What's the difference between $stop and $finish in Verilog?

I'm using a GUI simulator, and they both seem to开发者_运维问答 do the same thing.

$finish exits the simulation and gives control back to the operating system.

$stop suspends the simulation and puts a simulator in an interactive mode.

According to the IEEE Standard for Verilog (1364-2005, Section 17.4, "Simulation control system tasks"), $stop should suspend the simulation, and $finish should make the simulator exit and pass control back to the host operating system. Of course, different simulators may implement the specification in subtly different ways, and not all simulators are 100% compliant with the spec.

The documentation for your simulator might provide a more detailed description of its behavior, especially with respect to GUI vs. command-line modes.

$stop - Pauses the simulation, so you can resume it by using fg command in linux. In this case lincense will not be released and process also is not killed, consuming memory.

$finish - Simulation is finished, so releasing of license and killing the process will be done.

A quick reference link:

$finish;
    Finishes a simulation and exits the simulation process.
$stop;
    Halts a simulation and enters an interactive debug mode.

$stop : Undesired termination of the simulation. All the system activities are suspended. $finish : Used to relieve the compiler.

Good analogy would be $finish is like shutting down your computer and $stop is like abruptly pulling its plug.

This link explains it to some extent.

$stop - When Verilog encounters a $stop, it pauses as if you sent a Ctrl-C.

$finish - Verilog exits as if you sent Ctrl-D when it encounters $finish.

Taken from Page 15 of this indtroduction PDF.

cheers

I'm using the Modelsim GUI. When I have a $stop statement in simulation, it's as if I hit the stop button at the top of the GUI during a simulation run. However if I have a $finish statement, the GUI will display an exit prompt asking me if I want to quit modelsim completely.

Generally, $stop generally suspends the simulation where $finish is something that tells our simulator to terminate the Simulation, let's try to understand this scenario with the below example :

//enter code here
module tb ;
int x =5 ;
initial begin 
$display ("Hi",$time);
#10ns;
$stop ;
$display("Hi ",$time);
#20ns ;
$display("Hi",$time);   
if(x ==5)begin 
$error("this is Error"); 
$finish(1);  
end 

$display("After the $finish");
end
endmodule

Points to look : 1)So at 0ns, a "hi" message will be displayed after 10ns $stop will be called & it suspends the simulation.

2)now if we simply comment out $stop, then re-run our simulation we will observe that at 30 ns again hi message will be printed and if the condition will be stratified and $finish will be called so it will terminate the simulation, so after $finsh the Display message "After the $finish" will not be displayed.