What's a good PPC based >MACHINE< for profiling code for in-order processors

I know that older Macs have PPC processors in them, which is perfect, but whic开发者_如何学Ch specific models are suitable for dropping a linux distribution onto? I've not used a Mac in over 10 years now so I have no idea which to go for. In particular, I ask about ones that accept Linux because I believe Apple ask you to pay to develop on their machines or is it possible to use c++ with gcc and the LLVM for free on the mac?

I need to be able to profile code on an in-order risc processor, and the PPC seems like the best place to start, but what other CPUs offer similar coding experience? That is, with a much reduced instruction set, stalls when branching, microcode instructions and load-hit-store problems when switching between float/int/vector representations.

There is no charge to develop on Mac. There is a charge to install iOS products on an iPhone, and there is a charge to sell Mac products through App Store. But you can build c++ apps for free on Mac. Xcode itself is free.

Any PowerBook G4 is fine for this kind of work, and there are many pages on installing Linux on a PowerBook G4 if you wanted to do that (though I'd probably just Xcode rather than go through the hassle).

Use Mac OS X and get the free Xcode developer tools from Apple (Xcode 3.x) and also the free CHUD performance tools package which includes Shark, a very good sampling profiler which you will find extremely useful.

Slightly off-topic, but

• in-order

  It depends on precisely what you mean by in-order! PowerPC has a variety of synchronizing instructions like like sync, lwsync, and eieio to enforce (different types of!) memory ordering, and isync which flushes the instruction pipeline. IBM has a decent summary.

• risc processor

  I really wouldn't call the PPC "reduced" ;)

• stalls when branching

  IIRC, a correctly-predicted branch with its target in the instruction cache does not stall the G4 (I forget how the different models of G4 differ). OTOH, the G5 performs better if branch targets are 16-byte aligned (something about the branch target buffer).

• microcode instructions

  I thought half the point of RISC was to avoid microcode? I'm not aware of microcode updates, at any rate.

• load-hit-store problems when switching between float/int/vector representations

  I'm not sure what this means...

"Traditional" ARM might is probably closer to what you're looking for, but I suspect the more recent processors have some of the more "modern" processor features. My ARM box of choice is probably the SheevaPlug or similar, though the WZR-HP-G300NH router is cheaper (and comes with Wi-Fi) if you don't mind being constrained to 64 MB.