ARM v7 ORRS mnemonic without operand2

What does:

ORRS R1, R3 do?

Is it just R1 |= R3, possibly setting the N- or Z flags?

This might b开发者_C百科e blatantly obvious, but I haven't found any documentation that describes the ORR mnemonic without operand2.

Feedback is greatly appreciated.

-b.

It's a Thumb instruction. In a 16-bit Thumb opcode you can only fit the two operands, you don't get the extra operand2.

As you guessed, it does R1 |= R3. The S flag's presence indicates this instruction is part of an If-Then block (what Thumb has instead of proper ARM conditional execution); ORR and ORRS generate the same opcode and differ only by context.

In ARM assembly, instructions where the destination register (Rd) is the same as the source register (Rn) can omit Rd. So these are the same and will assemble to exactly the same instruction.

orrs r1, r1, r3
orrs r1, r3

add r1, r1, #5
add r1, #5

and so on.

It may be in the armv7m trm or its own trm, but they have a, I dont remember the term unified, assembly language, so

add r0,r3

will assemble for both arm and thumb, for thumb it is as is for arm the above equates to add r0,r0,r3. For thumb you dont get the three register option, but the functionality is implied r0=r0+r3.