MSP430F5418 port interrupt occurs for both high-to-low and low-to-high transitions
I had set MSP430F5418 P2.5 for high to low transition. But I am getting interrupts for both low-to-high and high-to-low transitions. Please my code snippet below.
P2OUT |= BIT5 /* Enable P2.5 internal resistances */ P2REN |= BIT5 /* Set up P2.5 as pull-Up resistances */ P2IES |= BIT5; P2IE |= BIT5; P2IFG &= ~BIT5; /* P2.5 IFG cleared */ #pragma vector=PORT2_VECTOR __interrupt void port2_interrupt (void) { switch (P2IV) 开发者_开发知识库 { case 0x0CU: { /* Do something here */ P2IFG &= ~BIT5; break; } default: { /* No Action */ break; } } }
Hans, I am not using a switch to assert the pin. It is actually done by another processor. I got a reply In TI (Texas instruments) forum that there could be a hidden high-to-low signal within a low-to-high transition and vice versa.
So, I modified my code as follows and it worked fine.
... P2OUT |= BIT5 ; /* Enable P2.5 internal resistance */ P2REN |= BIT5; /* Set up P2.5 as pull-up resistance */ P2IES |= BIT5; /* Sets P2IFG for high to low transition */ P2IE |= BIT5; /* P2.5 interrupt enabled */ P2IFG &= ~BIT5; /* P2.5 IFG cleared */ ... #pragma vector=PORT2_VECTOR __interrupt void port2_isr (void) { switch (P2IV) { case 0x0CU: { TA1CCTL0 &= ~CCIE; TA1CCR0 = 0U; TA1CCTL0 |= CCIE; TA1CCTL0 &= ~CCIFG; TA1CCR0 = TA1R + 15U; P2IFG &= ~BIT5; break; } ... ... } } #pragma vector = TIMER1_A0_VECTOR /* Timer1_A3 CC0 */ static __interrupt void _timer1_ao_isr (void) { TA1CCTL0 &= ~CCIE; if ((P2IN & BIT5) == 0U) { // Got a valid high-to-low assert here!!! } }
Not actually an answer, just a suggestion, rename your variables to something more meaningful, two months from now you won't remember that BIT5 is the pin that you check for a high-to-low transition. You can use a define to rename BIT5 to say, HIGH_TO_LOW_PIN. You can do the same thing with the timer setup, refactor it to something more meaningful.
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