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int2 vs int4 loads on Fermi architecture

If needed to load two int2 from devic开发者_如何转开发e memory to registers, how much worse are two consecutive loads with int2 compared with one load with int4?


This depends both on the GPU and on your memory access pattern. However, assuming (for lack of information in the question) sequential addressing on a compute capability 2.0+ GPU (Fermi GPU), see slide 27 of this presentation by Paulius Micikevicius from GTC 2010.

The slide shows that for multiprocessor occupancy that is low (low active threads per multiprocessor), int4 can make a big difference over int2. For high occupancy, there is little difference.

HOWEVER, as the slide notes, "Several independent smaller accesses have the same effect as one larger one. For example: Four 32-bit ~= one 128-bit". So if the two int2 values you need to load are independent, just issue the two loads one after another in your code, and it should be almost the same performance as doing one int4, assuming coherent memory access as mentioned above.

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