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makefile and c project

everybody out there i write a very simple c code which is following:

#include<stdio.h>
int sum(int x ,int y);
int mult(int x, int y);
int div(int x , int y);
int main()
{
    int a,b,s,m,d;
    system("clear");
     a =20;
     b =40;
    s=sum(a,b);
    m=mul(a,b);
    d=div(a,b);
    printf("\n the sum of given no. = %d\nThe product of given no. = %d\nThe division of given no = %d",s,m,d);
    return 0;
}

the name of the file is exp.c than i write the following code:

#include<stdio.h>
int sum( int x ,int y)
{
   int z;
   z=x+y;
   return z;
}

i saved it as sum.c than i write the following code :

#include<stdio.h>
int mult( int z ,int u)
{
   int v ;
   v=z*u;
   return v;
}

save it as mul.c than i write the following code

#include<stdio.h>
int div (int a, int b)
{ 
   int f;
   f=a/b;
   return f;
}

save it as div .c

i want to use all file as a single project. i want exp.c use the function defined in mul.c,div.c,sum.c. so i write a makefile the project which is following:

fun : exp.c
    gcc exp.c

exp.c : sum.o mul.o div.o

sum.o :sum.c
    gcc -c sum.c

mul.o :mul.c
    gcc -c product.c

div.o : div.c
    gcc -c div.c

now my problem is that i run mak开发者_StackOverflow社区e command i got following error:

exp.c:(.text+0x31): undefined reference to `sum'
exp.c:(.text+0x43): undefined reference to `mult'

what i'm doing wrong?

do i need header files ?

how can i do this without header files?

how to execute the program without make file ?

how to use gcc-o sum.c mul.c,div.c commands to run the project ? Please give me a detailed description


The easy way:

fun:
    gcc -o fun exp.c sum.c div.c product.c

The long-ish way:

fun: exp.o sum.o mul.o div.o
    gcc -o fun exp.o sum.o mul.o div.o

%.o: %.c
    gcc -c $< -o $@

The second method magically accepts any .c files and compiles them into the correct .o file, so then you don't need to make a new target for each new file.


Let's review your process, given the dependencies:

  1. You tell gcc to compile div, mul and sum into object code (.o).

  2. You tell gcc to compile exp into binary code.

The problem is you're not providing gcc with the object files generated in (1) when you do (2). You're telling it to compile only exp. That's why the linking of your functions fails.

Compile everything to .o, then run gcc with all the generated objects as parameters, not just the main source file.


Here is make file for your program

all: exp.c sum.o mul.o div.o
     gcc -o exp exp.c sum.o mul.o div.o
sum.o: sum.c
     gcc -o sum.o -c sum.c
mul.o: mul.c
     gcc -o mul.o -c mul.c
div.o: div.c
     gcc -o div.o -c div.c

After this you have to run your program by executing command

make all


Try this general purpose makefile, I wrote sometime back, you can use this for any project as long as all the files are in the same directory where Makefile is.

P_NAME := <your program name>
P_C_SRCS := $(wildcard *.c)
P_C_OBJS := ${P_C_SRCS:.c=.o}
P_INCLUDE_DIRS := <path to include dir>
 P_LIBRARY_DIRS := <path to lib dir>
P_LIBRARIES := <library name >
CPPFLAGS += $(foreach includedir,$(P_INCLUDE_DIRS),-I$(includedir))
LDFLAGS += $(foreach librarydir,$(P_LIBRARY_DIRS),-L$(librarydir))
LDFLAGS += $(foreach library,$(P_LIBRARIES),-l$(library))
CC := gcc -Wall -g
CCFLAGS := -Wall -g

.PHONY: all clean
all: $(P_NAME)
$(P_NAME): $(P_C_OBJS)
$(CC) $(CCFLAGS) $(P_C_OBJS) -o $(P_NAME) $(LDFLAGS)
clean:
@- $(RM) $(P_NAME)
@- $(RM) $(P_C_OBJS)
@- $(RM) core*
@- $(RM) tags

Your exp.c has syntax error m=mul(a,b); should be m=mult(a,b);

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