Basic Makefile and header dependencies
I am new to makefiles and I am a bit stuck. I have two c source files called trade.c and report.c . They both depend on a file called acc.h. The acc.h file is composed of two other header files, users.h and resellers.h. I am wondering how you write the dependency of the two head开发者_运维问答er files to the acc.h file. I have so far...
OBJECTS = trade.c report.c
CC = gcc
trading: $(OBJECTS)
$(CC) $(OBJECTS) -o trading
trade.o: trade.c accts.h
$(CC) -c trade.c
report.o: report.c accts.h
$(CC) -c report.c
Any help is greatly appreciated.
You have no other choice than to add all the header files in the dependency list for the object file, as follows.
trade.o: trade.c accts.h users.h resellers.h
$(CC) -c trade.c
In all professional settings I've seen with makefiles, the dependencies were not added manually -- excepted for special cases involving tools like lex
and yacc
-- but created automatically, either using options of the compiler (like -MM of gcc), or by using various independent tools like makedepend
or mkdep
.
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