minimization of program segment - if, else

X, Y, Z, T are different jobs. Ex, X = Multiplexer( ... )

if ( empty1 ) 
   if ( empty2 )
      if ( empty3 ) 
         if ( empty4 )
             // Do nothing
         else 
             X  
      else 
         Y
   else 
      Z
else 
   T 

EDIT : emptyA is a number 1 or 0, and A is member of the set { 1, 2, 3, 4 }

How can I rewrite that program segment so as to get minimum comparison cost

You have Verilog/HDL tags so assuming this is for synthesizable logic:

//This may be more readable
    wire [3:0] empties = {empty4,empty3,empty2,empty1};
    casex (empties)
      4'xxx0: blah = T;
      4'xx01: blah = Z;
      4'x011: blah = Y;
      4'0111: blah = X;
      default: blah = something_else; //Shouldn't do nothing
    endcase

The logic cost is going to depend on other factors than just this code.

if(!empty1)
  T
else if (!empty2)
  Z
else if (!empty3)
  Y
else if (!empty4)
  X

You can't reduce the comparisions as you have an action that is executed if the return value is false for all cases.