Why GNU Make canned recipe doesn't work?

I'm expecting to see files foo1 and foo3 created by the makefile below. However only a file foo3 is created. To me it seems that the canned recipe make-foo is simply ignored by make. The debug outcome of targets foo1 and foo2 (empty recipe) is identical.

# why canned recipe doesn't work ?
# http://www.gnu.org/software/make/manual/make.html#Canned-Recipes
define make-foo =
echo making $@
touch $@
endef

.PHONY: all
all: foo1 foo2 foo3

# foo1 is not created, but why ?
.PHONY: foo1
foo1:
    $(make-foo)

# debug output similar to foo1
.PHONY: foo2
foo2:

# this works
.PHONY: foo3
foo3:
    echo making $@
    touch $@

Running make:

xxxx@xxxx:/dev/shm$ make -dRr
GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

This program built for i686-pc-linux-gnu
Reading makefiles...
Reading makefile `makefile'...
Updating makefiles....
 Considering target file `makefile'.
  Looking for an implicit rule for `makefile'.
  No implicit rule found for `makefile'.
  Finished prerequisites of target file `makefile'.
 No need to remake target `makefile'.
Updating goal targets....
Considering target file `all'.
 File `all' does not exist.
  Considering target file `foo1'.
   File `foo1' does not exist.
   Finished prerequisites of target file `foo1'.
  Must remake target `foo1'.
  Successfully remade target file `foo1'.
  Considering target file `foo2'.
   File `foo2' does not exist.
   Finished prerequisites of target file `foo2'.
 开发者_如何学编程 Must remake target `foo2'.
  Successfully remade target file `foo2'.
  Considering target file `foo3'.
   File `foo3' does not exist.
   Finished prerequisites of target file `foo3'.
  Must remake target `foo3'.
echo making foo3
Putting child 0x0914c5f0 (foo3) PID 3132 on the chain.
Live child 0x0914c5f0 (foo3) PID 3132 
making foo3
Reaping winning child 0x0914c5f0 PID 3132 
touch foo3
Live child 0x0914c5f0 (foo3) PID 3133 
Reaping winning child 0x0914c5f0 PID 3133 
Removing child 0x0914c5f0 PID 3133 from chain.
  Successfully remade target file `foo3'.
 Finished prerequisites of target file `all'.
Must remake target `all'.
Successfully remade target file `all'.

Missing foo1:

xxxx@xxxx:/dev/shm$ ll foo*
-rw-r--r-- 1 xxxx xxxx 0 2011-02-17 20:04 foo3

I think you don't want the = at the end of the define line. This makefile works here for me:

define make-foo
echo making $@
touch $@
endef

.PHONY: foo1
foo1:
    $(make-foo)

Example:

$ make
echo making foo1
making foo1
touch foo1
$ ls
Makefile  foo1

The GNU make manual seems to indicate that the = should be just fine, but like you, I get different behaviour if I have it there.

Edit: I just asked:

GNU make differences in multiline variable declarations

To get some clarification on what's happening here...